Research Projects

The foundation of modern VLSI design flows is built upon technology libraries of standard cells, which serve as static data sources for logic synthesis, timing and power analysis, DFT, and physical implementation. While these libraries have evolved with process technology and EDA tools, they remain passive repositories of pre-characterized data. This static, flat nature limits their ability to support the design demands of next-generation systems, where complexity, scale, and multidomain optimization are essential. Current libraries suffer from three major limitations: (1) they cannot model complex high-dimensional dependencies; (2) they lack adaptability across domains for various environment and instantiation; and (3) they do not enable efficient reuse of accumulated design intelligence from prior design efforts. These limitations result in longer design cycles, higher manual effort, reduced accuracy, and silicon failures in the worst case, and aggravate as designs scale to billions of transistors. To address these challenges, this proposal introduces the Foundational Intelligent Library Model (FILM), a transformative, adaptive, and self-learning framework that reimagines the technology library as an intelligent design-time collaborator. FILM integrates machine learning, data analytics, large-language models, formal methods, and optimization techniques to perform predictive analysis, intelligent transformation, constraint-driven refinement, and real-time learning. FILM is envisioned as a collection of modular components, such as a Design Intelligence Abstraction Layer (DIAL), Self-adaptive Generation Engine (SAGE), Composable Element Library (CELLAR), Attribute Predictor (ORACLE), Optimizer (MORPH), and Design Checker (GUARD), coordinated to enable bidirectional inference and synthesis across the RTL-to-GDS design flow. The project is structured around four key objectives: (1) Design and formalize the FILM framework with built-in capabilities for multidomain attribute computation, intelligent modification, and self-learning, (2) Explore and benchmark implementation strategies for FILM components to identify the most scalable and efficient approach, (3) Integrate FILM with EDA tools to assess its effectiveness, and (4) Demonstrate FILM's capabilities on complex industrial designs to replace static libraries with intelligent alternatives. The project builds upon strong preliminary results obtained for ML-based modelling multi-input switching, flip-flop timing interdependency, post-routing optimization and congestion prediction. These works illustrate the feasibility of embedding intelligence into the design stack and serve as a foundation for FILM. In terms of impact, FILM has the potential to dramatically reduce design turnaround time, minimize costly iterations, and improve key performance metrics, especially for complex, industry-scale designs. More importantly, it can help scale VLSI design to meet the growing demand for high-performance, energy-efficient chips in emerging domains like AI, 5G, and edge computing, where traditional design methods are increasingly falling short. However, modifying the nature of the library is a disruptive and high-risk undertaking. Therefore, rigorous experimentation and feasibility analysis are necessary to assess the impact of such a paradigm shift: an objective that this project seeks to pursue. If successful, this work could become a reference model for intelligent library construction in both academic and industrial settings. By targeting a high-risk, high-reward objective, the project is ideally suited for support under the Advanced Research Grant (ARG) scheme and holds the promise of redefining the foundation of how digital circuits are implemented and optimized in the ML-driven design era.