×

img Accessibility Controls

Innovations Banner

Academic Innovations

A fault attack resistant crypto-accelerator for ultra-lightweight encryption protocols of GIFT family in RISC-V architecture.

Innovator Details

Innovator
Dr. Bodhisatwa Mazumdar

About

The research team designed a novel fault attack countermeasure to thwart a major class of fault attacks, including Persistent fault attacks(PFA) and all variants of fault attacks based on the analysis of faulty-correct pairs of ciphertexts such as Differential Fault attacks, Algebraic fault attacks, etc. Also implemented GIFT cipher on RISC-V, RAR5 simulator and in Verilog
Funding Organization
Funding Organization
Department of Science and Technology (DST)
Quick Information
TRL: Technology Readiness Level
3
TIH Name
C3iHub, IIT Kanpur
Status
ongoing
arrowtop
Latest Updates
Loading…