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Cost effective integration of 20-4OV n/p LDMOS devices in SCL's 0.18mm CMOS process

Implementing Organization

Indian Institute of Technology (IIT), Gandhinagar
Principal Investigator
Dr Nihar Ranjan Mohaptra
Assistant Professor, Indian Institute of Technology (IIT) Gandhinagar

Related Research

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Funding Organization
Funding Organization
Department of Science and Technology (DST)
Quick Information
Area of Research
Physical Sciences
Focus Area
Integration of 20-4OV n/p LDMOS devices
Start Date
2016
End Date
2019
Status
Completed
Contact
nihar@iitgn.ac.in
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
Publications
00
No. of Patents
Filed : 00
Grant : 00
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