Research Projects

With Moore’s law of device miniaturization reaching its fundamental physical limit, further progress towards low power, faster devices is facing a roadblock. However, low-power, high-speed (rapid switching) transistors are of great importance today, also for various emerging electronic applications, such as IoT platforms, portable, wearable electronics etc. One non-typical solution to this problem was offered by Salahuddin and Datta, where they proposed rapid switching in FETs by the use of a dielectric/ferroelectric stack that helps to stabilize a so-called negative capacitance region. Notably, the subthreshold slope (SS) that defines the rapid switching capacity of a transistor is limited by the Boltzmann barrier, which is ~60 mV/dec, at RT. While one option to go beyond this limit is to tunnel through the barrier (e.g. tunnel-FETs), the other proposed solution was to achieve a larger rate of change of semiconductor surface potential than the gate potential applied. It is like a step-up transformer within the FET device itself. It can be achieved by the rapid switching of a ferroelectric material, whose negative capacitance (nc) region is stabilized with a dielectric placed next to it. Such transistors can be called nc-FETs and can offer subthermionic transport, i.e. ultra-low SS values. Following the initial idea, there has been a tremendous interest in the experimental demonstration of nc-FETs. Typical literature reports include vacuum-deposited devices with ~20 mV/dec SS values. In the case of solution processing, there are only few reports, where polymer ferroelectric PVDF-TrFE has been used alongside vacuum-deposited semiconductor and dielectric layer. In summary, there’s no literature report to date where complete nc-FETs are solution-processed. In this regard, we would like to demonstrate fully-printed nc-FETs and complex circuits based on it. We plan to encompass the entire material domain in this project that can be considered for solution-processed nc-FETs. At first, printed 2D and oxide semiconductor based nc-FETs will be fabricated on PEN/parylene substrates with organic polyvinyl alcohol (PVA) and plyvinyledene fluoride-trifluoroethylene (PVDF-TrFE) dielectric/ferroelectric and their bending strain tolerance will be demonstrated. In addition, superior devices will be fabricated first by replacing PVA with Al2O3, and then PVDF-TrFE with suitable oxide (perovskite) ferroelectrics that can be solution processed at low temperatures. Here, we aim to demonstrate ultra-low leakage and long-term stability of the charged state towards printed memory applications. Furthermore, specific attempts will be made to lower the hysteresis of the printed nc-FETs for the realization of certain circuit elements e.g., differential amplifiers, analog-to-digital converters (ADC) etc. When successful, such printed nc-FETs and low-power electronics would offer an excellent platform for battery on-chip IoT applications, fully-printed sensor patches etc.