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Designing Side-Channel Attack Resilient, Performance-Optimized Quantum-Safe Algorithms on FPGA and ASIC Platforms for Secure and Reliable End-to-End Post- Quantum Communications (SPARQ)

Implementing Organization

Indian Institute Of Technology Roorkee
Principal Investigator
Dr. Rajat Sadhukhan
Indian Institute Of Technology Roorkee
rajatssr835@gmail.com

Project Overview

The exponential growth of digital technology has propelled us into an Information Age where zettabytes of data, including sensitive financial and governmental information, are exchanged online annually. This data is increasingly managed by resource-constrained devices such as IoT sensors, wearables, and embedded systems, which power applications ranging from smart cities and autonomous vehicles to industrial automation and national defense. By 2025, it is estimated that nearly 55.7 billion connected IoT devices will generate approximately 80 zettabytes of data, comprising nearly half of global data production. These devices, despite their critical roles, face challenges in implementing secure communication due to their limited computational, memory, and energy resources. The imminent advent of quantum computing compounds this issue, as it threatens to render current public-key cryptographic systems obsolete. Post-Quantum Cryptography (PQC) algorithms are being standardized to address these vulnerabilities, but they introduce unique challenges, particularly in resource-constrained environments like IoT devices. These lightweight systems require cryptographic solutions that balance high security with minimal resource consumption. Furthermore, PQC algorithms remain susceptible to physical side-channel attacks (SCAs), which exploit information leakage, such as power consumption and timing variations, to extract sensitive data. To address these challenges, this project specifically targets the development of lightweight PQC algorithms tailored for IoT devices, optimizing them for performance, memory, and energy efficiency while ensuring resilience against SCAs. The project proposes a comprehensive strategy, including application-specific design space exploration, SCA evaluation, and integration of robust countermeasures such as masking, noise addition, and constant-time implementation. Using platforms like Xilinx Zynq-7000 FPGAs and 180nm ASIC technology nodes, the research aims to balance performance, security, and resource constraints. Additionally, the project aligns with India's National Quantum Mission, contributing to cybersecurity advancements, fostering indigenous technology development, and supporting national initiatives like Digital India and Atmanirbhar Bharat. By focusing on lightweight PQC solutions optimized for IoT devices, this effort aims to establish a secure, end-to-end communication framework resilient to quantum and physical threats, thereby positioning India as a leader in the quantum technology domain.
Funding Organization
Quick Information
Area of Research
Engineering Sciences
Focus Area
Computer Engineering
Start Date
03 Jun 2025
End Date
02 Jun 2028
Status
ongoing
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
Publications
00
No. of Patents
Filed : 00
Grant : 00
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