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Development of Fast Fault Detection and Location Estimation Scheme for Low-Voltage DC Microgrids

Implementing Organization

Principal Investigator
Dr. Biswajit Sahoo
National Institute Of Technology Silchar
biswajitsahoo@ee.nits.ac.in

Project Overview

The low-voltage DC (LVDC) microgrid offers several advantages, and its integration into power systems has grown rapidly in past few years. However, fault detection and location estimation in LVDC microgrids remain challenging due to the high fault current magnitudes and varying fault levels. Existing protection systems—whether based on traditional methods, signal processing, or machine learning—have various drawbacks. These algorithms often fail to operate correctly or experience delayed response times, particularly when dealing with faults during islanding operation, faults involving different microgrid topologies, or high-resistance faults. Additionally, current schemes struggle to differentiate between actual fault conditions, external faults, critical no-fault situations, and transient events. Moreover, most protection schemes do not adequately evaluate performance in the face of the intermittent and volatile behavior of distributed generators (DGs) or microgrids with diverse DG types. Moreover, the performance of current derivative-based protection schemes is significantly compromised in the presence of measurement noise and varying levels of distributed generation (DG) penetration. As a result, the widespread adoption of LVDC microgrids is limited by the lack of fast, reliable protection algorithms and the absence of standardization. The limitations of existing protection methods highlight the urgent need for further research to develop more robust and reliable solutions. The proposed work aims to address these gaps by developing a protection scheme that can overcome the challenges faced by current systems. The primary objective of the proposed scheme is to provide a fast, effective, and reliable protection mechanism for LVDC microgrids. This methodology will be capable of detecting all fault types and accurately localizing faults under a wide range of fault and operating conditions, while remaining resilient to the intermittent and volatile behaviour of DGs, thus facilitating higher levels of DG penetration. The primary focus of the algorithm will be the mathematical analysis of faults on the LVDC Microgrid, machine learning-based protection technique, fault detection and location determination methodology. Performance will be assessed focusing on early detection of fault, accurate fault localization and enhancement of grid reliability. The hardware simulator (such as Typhoon HIL, OPAL-RT) and software tools (e.g., MATLAB/ SIMULINK, AI/ML-based algorithms) needed to achieve the modelling, simulation, implementation of protection algorithms and real time validation will be identified. A model for an LVDC microgrid testbed including solar panels, wind turbines, fuel cells, a battery energy storage system, and bidirectional converters will be developed. A LVDC microgrid testbed will be constructed in hardware-in-loop (HIL) platform to validate simulation results, demonstrate the scheme's real-time performance and provide real-world data.
Funding Organization
Quick Information
Area of Research
Engineering Sciences
Focus Area
Electrical Engineering
Start Date
09 Jul 2025
End Date
08 Jul 2028
Status
ongoing
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
Publications
00
No. of Patents
Filed : 00
Grant : 00
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