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An Efficient All-Optical Dot-Product Engine for Photonic Accelerators Using Cascaded Intensity Modulation

Implementing Organization

Indian Institute Of Technology Hyderabad
Principal Investigator
Dr. Aneesh Sobhanan
Indian Institute Of Technology Hyderabad
aneesh@ee.iith.ac.in

Project Overview

Vector-matrix multiplication (VMM) is a fundamental mathematical operation in many complex computations, such as artificial neural networks (ANN) and real-time image processing, including fast Fourier transforms (FFT). A single VMM operation with N elements involves N² calculations, leading to high latency and significant energy demands. However, developing an efficient Optical Dot-Product Engine (O-DPE) that performs basic vector-dot products could help reduce latency and increase operational bandwidth. Here, we propose an optical accelerator capable of performing these operations at much higher speeds. By encoding vector elements in the amplitude of light and using coherent interference, we can inherently emulate the product of two elements. Leveraging the multidimensional nature of light to encode different vectors in this process, this approach has the potential to replace hardware accelerators in specific high-performance computing applications. Balanced photodetection of these elements along different orthogonal dimensions enables the accumulation operation, resulting in an all-optical dot-product engine that completes the entire MAC operation in a single time step, without requiring intermediate memory storage and access, as needed in conventional hardware accelerators. While the initial demonstration may use discrete components, the long-term goal of this project is to design a photonic integrated circuit (PIC) for these operations in collaboration with academic and industry partners. In the proposed approach, as with other analog matrix multiplication methods, intermediate computation results do not consume energy in memory access. This enables our approach to achieve 1-2 orders of magnitude lower power consumption compared to digital processors. Additionally, through mode multiplexers and de-multiplexers, our multiplier can scale to at least three orders of magnitude greater than time-division multiplexing (TDM) approaches, which are typically limited in scalability to around 100. Our approach leverages all available degrees of freedom of light to construct photonic matrix multiplications, achieving levels of parallelization and scalability that are currently unattainable with electronics. This research could thus mark a significant step toward analog photonics playing a central role in artificial neural networks. Furthermore, since numerically solving static partial differential equations (PDEs) is akin to solving linear systems, the dynamic range and scalability of the proposed matrix-vector multiplier could extend the role of optical computing in tackling problems traditionally addressed in high-performance computing facilities. Here, we propose cascading two intensity modulators for scalar multiplication, instead of having parallel paths for interference as in previous works, and performing accumulation in the BPD across different wavelengths to complete the MAC operation.
Funding Organization
Quick Information
Area of Research
Engineering Sciences
Focus Area
Electronics Engineering
Start Date
06 Jun 2025
End Date
05 Jun 2028
Status
ongoing
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
Publications
00
No. of Patents
Filed : 00
Grant : 00
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