'Rationale': Power semiconductor devices are critical components in all modern power electronic systems and are used in a wide range of applications such as eV, fast charger, renewable energy, motor drives, solid state transformers, switched mode power supply etc. Silicon Carbide (SiC) trench MOSFETs have emerged as promising alternatives to silicon devices as well as SiC D-MOSFETs. However, challenges like high gate oxide electric fields (Ep,ox), reliability issues, and the trade-off between on-resistance (Ronsp) and breakdown voltage (VBR) limits utilizing its full potential. Existing solutions offer limited improvements or pose fabrication challenges. This work will investigate the available state of the art solutions and develop novel device structures and design guidelines promising significant reductions in Ronsp and increased VBR, while accounting for practical fabrication challenges. Scientific 'Objectives': 1) Characterize commercially available SiC trench MOSFETs to quantify limitations in Ronsp, VBR, and reliability issues under stress. 2) Develop a calibrated TCAD deck and study SiC trench MOSFETs with CSSJ-based drift layers and other novel structures, optimizing trade-offs between Ronsp, VBR, and Ep,ox. 3) Experimentally investigate the CSSJ concept through MOS test structures to establish its feasibility, focusing on the detection and stability of the negative interface charge. 'Hypothesis': The hypothesis is that incorporating a CSSJ drift layer in SiC trench MOSFETs can significantly lower Ronsp and enhance VBR without compromising gate oxide reliability. The CSSJ replaces conventional p-pillars with a negative interface charge sheet at the Al2O3/SiO2 interface, controlled via deposition parameters, offering fabrication simplicity and performance advantages over traditional SJ structures. 'Experiments': 1) Characterization of Commercial Devices: Measure static (Ronsp, VBR, Vt) and dynamic parameters under normal and accelerated conditions (High Temperature Gate Bias, High Temperature Reverse Bias). Analyse degradation mechanisms and reliability issues. 2) TCAD Simulations: Calibrate the simulation deck using experimental data, then investigate novel trench structures for improvements in Ronsp, VBR, and Ep,ox. Benchmark results against conventional designs. 3) Experimental Validation of CSSJ: Fabricate MOS test structures on commercial SiC wafers, varying Al2O3 thickness and deposition temperature. Characterize negative interface charge and assess its stability under thermal and electrical stress. 'Significance': The proposed solutions would lead to substantial advancements in the in-house design and development capability of SiC devices that are compact, thermally efficient, and cost-effective. These findings could pave the way for commercialization, with direct applications in renewable energy, electric mobility, and industrial automation, positioning India as a leader in power electronic research and development.