Research Projects

Presently, there is an increasing demand for FMCW radars. THE FMCW Radar changes its frequency during the measurement, like chirp generation. FMCW radars can measure very small ranges to the target and hence finds their application in the automobile industry. The transmitted signal's Phase noise skirt limits such measurements' accuracy. There is a lot of literature research to address this phase noise. However, they all revolve around the design of extremely low phase noise VCO, having an excellent external crystal reference, and having a low bandwidth PLL. The state of art jitter of the frequency synthesizer using both methods is less than 100fs, and there is always a research interest, especially in FMCW radar. This project aims to use a nested loop in PLL to suppress the VCO noise. The first loop aims to improve the inherent phase noise of the Oscillator. A delay element in this loop determines the Oscillator's frequency. With the new development of an extremely low phase noise charge pump and inherently low phase noise of the delay element, there is an improvement of 12 dB phase noise in VCO. This project will aim to achieve a 50fs Jitter using the phase noise cancellation technique of the VCO and a novel development of charge pump. First-order simulation shows about 12dB suppression of the noise