Development of carrier selective tunneling rear contact on n-type and p-type silicon wafers for ultra-low surface recombination velocity and their implementation for lab scale (3”*3”) high efficiency (>20%) solar cells | India Science, Technology & Innovation - ISTI Portal

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Development of carrier selective tunneling rear contact on n-type and p-type silicon wafers for ultra-low surface recombination velocity and their implementation for lab scale (3”*3”) high efficiency (>20%) solar cells

Implementing Organization

Indian Institute of Engineering Science and Technology

Principal Investigator

Prof. Hiranmay Saha

Chair Professor and Coordinator

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Indian Institute of Engineering Science and Technology

Related Research

Quick Information

Area of Research

Physical Sciences

Focus Area

solar cells

Start Year

2016

End Year

2019

Sanction Amount

₹ 2.94 Cr

Status

Completed

Output

No. of Research Paper

00

Technologies (If Any)

00

No. of PhD Produced

N/A

Startup (If Any)

00

No. of Patents

Filed :00

Grant :00