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Integration of variable frequency clock & gated clock tree to mitigate power supply noise in multi-core Cpu

Implementing Organization

National Institute of Technology (Arunachal Pradesh),
Principal Investigator
Dr. A. Majumder
Assistant Professor
|
National Institute of Technology (Arunachal Pradesh),

Related Research

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Funding Organization
Funding Organization
Department of Science and Technology (DST)
Quick Information
Area of Research
Engineering Sciences
Focus Area
Computer Architecture
Start Year
2019
Sanction Amount
₹ 38.88 L
Status
Ongoing
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
N/A
Startup (If Any)
00
No. of Patents
Filed :00
Grant :00
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