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Interference rejection using built-in filter based band-pass Sigma Delta modulators

Implementing Organization

National Institute of Technology Goa
Principal Investigator
Dr. Nithin Kumar YB
National Institute of Technology Goa
CO-Principal Investigator
Dr. Vasantha M H National Institute Of Technology Goa
Goa, South Goa-403401
Farmagudi, Ponda

About

The trend in wireless receiver architectures is to move the analog-to-digital converter (ADC) towards the antenna, thus relaxing the requirements placed on analog circuits at the expense of a more complex digital circuitry. This also allows more digital integration of analog functions on a single chip resulting in a cheaper system. In these architectures, currently, surface acoustic wave (SAW)-less receiver schemes are preferred due to their compatibility with multiple standards and programmability. However, these architectures are prone to performance degradation caused by interference signals like out of band blockers. Indeed, to suppress those interference signals, conventional solutions use a bulky, off-chip, high Q, SAW filter which increases system cost, area and complexity. State of the art SAW-less receiver architectures mitigate the interference problems in the RF front-end like Low Noise Amplifier and Mixers. However in presence strong interferences receiver system requires additional stringent filter before ADC. Interferences can also be rejected in baseband using built-in low-pass filter for a base band receiver architecture. However zero-IF architecture suffers from DC offset and 1/f noise. These issues can mitigates by using low-IF architectures, which requires band-pass Sigma Delta Modulators to digitize the signal at IF. Sigma delta converters have many advantages that make it the best candidate for receiver applications. They give rise to high performance without requiring to use precision components; moreover, since the processing is dominated by the digital part, the entire architecture consumes relatively lower power. Sigma-Delta modulator achieves better performance due to noise shaping and oversampling. Significant efforts were made in the last few years to obtain low power, higher bandwidth ADC. The architecture requires an additional band-pass filter to remove interference and digital conversion can be implemented by band-pass modulators. However interference is a concern in the state of art modulators, hence embedded filter based modulator is need of the time. The Proposed topology in this project eliminates need of the stringent Filter, which can embedded into the band-pass Sigma Delta Modulator with negligible additional power dissipation and improved performance.
Funding Organization
Funding Organization
Science and Engineering Research Board (SERB), New Delhi
Anusandhan National Research Foundation (ANRF)
Quick Information
Area of Research
Engineering Sciences
Focus Area
Signal Processing
Start Year
2020
End Year
2023
Sanction Amount
₹ 43.01 L
Status
Completed
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
N/A
Startup (If Any)
00
No. of Patents
Filed :00
Grant :00
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