Research Projects

Moore's law of device miniaturization is reaching its limit, but low-power, high-speed transistors are crucial for emerging electronic applications like IoT platforms and portable electronics. salahuddin and Datta proposed rapid switching in FETs using a dielectric or ferroelectric stack to stabilize a negative capacitance region. This allows for ultra-low subthreshold slope (ss) values, which are limited by the Boltzmann barrier. nc-FETs, which offer subthermionic transport, have gained interest in experimental demonstrations. Typically, literature reports include vacuum-deposited devices with -20 mV or dec ss values. However, there is no literature report on solution-processed nc-FETs. This project aims to demonstrate fully-printed nc-FETs and complex circuits based on them. The project will first fabricate printed 2D and oxide semiconductor-based nc-FETs on PEN or parylene substrates with organic polyvinyl alcohol (PVA) and plyvinyledene fluoride-trifluoroethylene (PVDF-TrFE) dielectric or ferroelectric, demonstrating their bending strain tolerance. superior devices will be fabricated by replacing PVA with Al2O3 and PVDF-TrFE with suitable oxide ferroelectrics. The goal is to demonstrate ultra-low leakage and long-term stability of the charged state for printed memory applications.