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Quantum materials for memory device applications: Materials to Devices

Implementing Organization

Centre For Materials For Electronics Technology, Panchawati, Maharashtra
Principal Investigator
Dr. Ranjit Vilas Kashid
Centre for Materials for Electronics Technology (C-MET), Maharashtra

Project Overview

The Von Neumann bottleneck which is the separation between memory and central processing unit (CPU) in traditional computers is facing challenges due to massive data processing [1]. These bottlenecks can be addressed by fabricating complementary two and three-terminal devices with built-in non-volatile memory such as memristors, floating gate memories etc. Here in this proposal, we propose to (a) synthesize large area Quantum Materials like MX2 (M: Mo, W and X: S, Se) using the CVD/ALD route (b) dry/wet transfer of monolayer / a few layers to fabricate heterostructures, (c) fabricate memristive devices in discrete and crossbar architecture (d) Perform room temperature electrical measurements to demonstrate memory application.
Funding Organization
Funding Organization
Science and Engineering Research Board (SERB), New Delhi
Anusandhan National Research Foundation (ANRF)
Quick Information
Area of Research
Material Sciences
Focus Area
Quantum Materials
Start Year
2023
End Year
2025
Sanction Amount
₹ 30.04 L
Status
Completed
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
N/A
Startup (If Any)
00
No. of Patents
Filed :00
Grant :00
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