Design and development of real-time semantic segmentation networks and the corresponding FPGA-ASIC based hardware accelerators for possible deployment in commercial prototype for autonomous driving
Implementing Organization
Indian Institute of Technology (IIT)
Principal Investigator
Dr. Rafi Ahamed Shaik
Department of Physics, Indian Institute of Technology (IIT),Guwahati, Assam, 781039
CO-Principal Investigator
Prof. Manas Kamal Bhuyan
Indian Institute of Technology (IIT)
About
The demand for self-driving features in smart cars has significantly increased in recent years. The first step in decision-making for driverless cars involves scene parsing of road images, which uses semantic segmentation. Deep neural networks have been developed for this purpose, but general-purpose compute processors are slow and energy inefficient. This project aims to design, develop, and implement deep networks and FPGA-ASIC-based hardware architectures and accelerators for semantic segmentation of road images. Hardware accelerators will provide a fast and energy-efficient solution, making this project a promising deployment solution. Additionally, suitable deep neural networks will be developed and trained before hardware-based implementations.