Compact large-scale integrated linear photonic processor for artificial intelligence and machine learning (AI/ML) applications
Implementing Organization
Indian Institute of Technology (IIT), Kanpur
Principal Investigator
Dr. Rituraj
Indian Institute of Technology (IIT), Kanpur
About
In this information age, our computational needs have been growing exponentially. Over the last few decades, the scaling of the electronic devices following Moore’s law was able to meet these growing computational needs by packing a larger number of smaller and faster transistors on a Silicon chip. Now with the transistors already close to their smallest possible dimensions, there has been an ongoing effort to explore other possible technologies to meet our ever-increasing computational demands. Realizing a large-scale linear photonic processor can enable fast and energy-efficient linear operations which will have a huge impact across multiple disciplines and especially so for the artificial intelligence and machine learning (AI/ML) applications. One can then deploy specialized hardware for the AI/ML applications which would perform all the linear operations in the photonics domain and the other non-linear and storage operations in the electronics domain. To be able to realize a photonic integrated circuit (PIC) with a large number of nanophotonic devices on a small chip, one needs to miniaturize all the photonic components – waveguides, Mach-Zehnder Interferometers (MZIs), and tunable phase shifters. At the same time, one also needs to overcome the unwanted interference/crosstalk between the different components which inevitably arises when the waveguides are brought closer for a denser packing. One of the standard approaches to miniaturize the waveguides and the MZIs is to use materials with large refractive index contrast. A medium with a higher refractive index is more efficient in confining light. But this solution is severely limited by the choice of materials available and their compatibility with the Silicon photonics technology. This project aims to find solutions in terms of the photonic device design and architecture to enable the realization of truly large-scale compact PIC-based linear processors. The proposed photonic devices would be designed and verified using numerical inverse-design algorithms as well as FDFD (Finite-Difference Frequency-Domain) and FDTD (Finite-Difference Time-Domain) based electromagnetic simulation packages. The project tasks listed in the detailed technical document will remove several bottlenecks towards realizing a large-scale integrated linear photonic processor.
Patents
0
Source
Source
Science and Engineering Research Board (SERB), DST 2022-23
Science and Engineering Research Board (SERB), New Delhi
Anusandhan National Research Foundation (ANRF)
Quick Information
Area of Research
Engineering Sciences
Start Year
2022
End Year
2024
Sanction Amount
₹ 31.90 L
Status
Completed
Contact
rituraj@iitk.ac.in
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
No. of Patents
Filed :00
Grant :00
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