Design and Hardware Implementation of Non-von-Neumann Accelerators for Energy Constrained Edge Computing Applications
Implementing Organization
Indian Institute of Science
Principal Investigator
Prof. Viveka KonandurRajanna
Indian Institute of Science
About
The recent explosion of machine learning applications has improved accuracy across numerous applications ranging from traditional applications such as face recognition to, more recently, language comprehension. One of the main challenges in systems implementing machine learning algorithms is the huge computational overhead, especially in multiply and accumulate (or MAC) operations and the energy consumed in moving data between different points within a system. In-memory computing combines data storage with approximate computation to enable significantly higher energy efficiency in error-resilient applications improving energy efficiency by several orders of magnitude. However, there are several challenges associated with in-memory computing that need to be addressed for this efficiency to translate into low system consumption or lower energy per inference. This work proposes to address these challenges by enabling more than MAC in-memory computation and data-path optimized design to help bridge the gap between stand-alone memory computation and system implementation.
Patents
0
Source
Source
Science and Engineering Research Board (SERB), DST 2022-23
Science and Engineering Research Board (SERB), New Delhi
Anusandhan National Research Foundation (ANRF)
Quick Information
Area of Research
Engineering Sciences
Start Year
2023
End Year
2026
Sanction Amount
₹ 47.23 L
Status
Ongoing
Contact
krviveka@iisc.ac.in
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
No. of Patents
Filed :00
Grant :00
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