Research Projects

This research investigates the DC performance of three MOSFETs with different channel lengths (40 nm, 200 nm, 800 nm) and highly doped source and drain regions. A high-performance smart MOSFET is designed, achieving a large current of 20 mA/µm for a 40 nm channel length MOSFET. Two cap layers are designed in both source and drain regions, with thicknesses of 40 nm and 8 nm respectively. Each cap layer is divided into three layers with different doping concentrations, with the doping concentration decreasing from upper to lower layers to reduce kink effect.