This project proposal is based on an unpublished work (which is discussed in "other technical details" section), wherein we observed that the logic gates and/or circuits obtained from Boolean functions can be combined using the graph operations. One of the motivations of this proposal relies on the fact that converting Boolean functions into simple graphs enables us to use graph operations like union and intersection to construct a system of the complicated logic circuit with minimum simplification steps/axioms. Further, representation of the truth outputs of a Boolean function with simple labeled graph is a wonderful visualization of an abstract entity. Also, converting a Boolean function into a graph or a matrix has a great potential applications in cryptography. Detailed explanation of the mechanism of converting a Boolean function into a graph and vice-versa are explained in the attached unpublished manuscript.
Patents
0
Source
Source
Science and Engineering Research Board (SERB), DST 2022-23
Science and Engineering Research Board (SERB), New Delhi
Anusandhan National Research Foundation (ANRF)
Quick Information
Area of Research
Mathematical Sciences
Start Year
2022
End Year
2025
Sanction Amount
₹ 18.30 L
Status
Completed
Contact
geteumbrey@gmail.com
Output
No. of Research Paper
00
Technologies (If Any)
00
No. of PhD Produced
00
No. of Patents
Filed :00
Grant :00
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