Centre For Materials For Electronics Technology, Maharashtra Panchawati
Project Overview
The Von Neumann bottleneck which is the separation between memory and central processing unit (CPU) in traditional computers is facing challenges due to massive data processing [1]. These bottlenecks can be addressed by fabricating complementary two and three-terminal devices with built-in non-volatile memory such as memristors, floating gate memories etc. Here in this proposal, we propose to (a) synthesize large area Quantum Materials like MX2 (M: Mo, W and X: S, Se) using the CVD/ALD route (b) dry/wet transfer of monolayer / a few layers to fabricate heterostructures, (c) fabricate memristive devices in discrete and crossbar architecture (d) Perform room temperature electrical measurements to demonstrate memory application.
Source
Source
Anusandhan National Research Foundation/Science and Engineering Research Board (SERB), DST 2023-24
Centre For Materials For Electronics Technology, Maharashtra Panchawati
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